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| EPSRC Reference: |
GR/R40005/01 |
| Title: |
Low Power High Performance Microarchitecture and Compilation |
| Principal Investigator: |
Professor M O'Boyle |
| Other Investigators: |
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| Researcher Co-investigator: |
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| Project Partner: |
| Edinburgh Portable Compilers Ltd |
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| Department: |
Sch of Informatics |
| Organisation: |
University of Edinburgh |
| Scheme: |
Standard Research |
| Starts: |
01 April 2002 |
Ends: |
30 September 2005 |
Value (£): |
115,093
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| EPSRC Research Topic Classifications: |
| Energy Efficiency |
Parallel Computing |
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| EPSRC Industrial Sector Classifications: |
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| Related Grants: |
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| Panel History: |
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Summary |
Power consumption will shortly become one of the critical issues in embedded system and general purpose micro-processor architecture. The aim of this project is therefore to investigate new microarchitectural and compiler techniques to reduce power consumption. The performance and power consumption validation of these techniques are based on cycle-level power and performance architectural simulators. These tools will allow quantative analysis of the effectiveness of the proposed solutions with arbitrary architectural configurations and program workloads. This project will address the issue of realistic implementations, different methodologies and synergy between hardware and software to design low power computing systems.
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| Final Report Summary |
Power consumption will shortly become one of the critical issues in embedded system and general purpose micro-processor architecture. The aim of this project is therefore to investigate new microarchitectural and compiler techniques to reduce power consumption. The performance and power consumption validation of these techniques are based on cycle-level power and performance architectural simulators. These tools will allow quantative analysis of the effectiveness of the proposed solutions with arbitrary architectural configurations and program workloads. This project will address the issue of realistic implementations, different methodologies and synergy between hardware and software to design low power computing systems.
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| Further Information: |
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| Organisation Website: |
http://www.ed.ac.uk |
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