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| EPSRC Reference: |
GR/A01503/01 |
| Title: |
AF: ADAPTIVE PROGRAM ANALYSIS, TRANSFORMATION AND OPTIMISATION |
| Principal Investigator: |
Professor M O'Boyle |
| Other Investigators: |
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| Researcher Co-investigator: |
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| Project Partner: |
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| Department: |
Sch of Informatics |
| Organisation: |
University of Edinburgh |
| Scheme: |
Advanced Fellowship |
| Starts: |
01 January 2001 |
Ends: |
31 December 2005 |
Value (£): |
239,646
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| EPSRC Research Topic Classifications: |
| Systems Methodology and Architecture |
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| EPSRC Industrial Sector Classifications: |
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| Related Grants: |
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| Panel History: |
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Summary |
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The growth in the use of computing technology is matched by a continuing demand for higher performance in all areas of computing. This demand has led to an exponential growth in hardware performance and architecture evolution. Such a rapid change of architectural range has placed enormous stress on compiler technology such that it can no longer keep up with architectural change. Currently, state-of-the art compilers can achieve, at best, around 10% of peak performance from a typical modern super-scalar micro-processor. This project aims to develop the underlying theory and technology enabling compilers to adapt with and exploit the exponential growth in hardware performance and aims to develop a systematic optimisation approach suitable for a diverse range of requirement from cost critical hard-wired embedded applications to super-computing grand challenge applications and just-in-time compilation of downloaded applications for reconfigurable FPGA based processors. Given this foundational work, this project aims to change the area of optimising compilation from one that is ad hoc and reactive to hardware evolution to one based on solid foundations that drives architectural change whereby the next generation of hardware, is co-designed by compiler technology.
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| Final Report Summary |
The growth in the use of computing technology is matched by a
continuing demand for higher performance in all areas of
computing. This demand has led to an exponential growth in hardware
performance.
However, this growth in hardware has not been matched by software.
Currently we are able to exploit just 10% of the potential hardware
performance due to inefficient software.
This project investigates the design of automatic tools
(compilers) to speedup software. It develops a new approach which
allows the tools to adapt with and exploit the growth in hardware
performance. This is achieved by using techniques developed in the
area of artificial intelligence which allow systems to learn over time.
Using such an approach, we have improved the performance of software
and outperformed all other standard methods.
In addition, we have developed new approaches where the software
guides the hardware as its running. This provides increased
performance, a reduction in power and the construction of cheaper, more
efficient processors, again outperforming all existing approaches.
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| Further Information: |
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| Organisation Website: |
http://www.ed.ac.uk |
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