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Details of Grant 

EPSRC Reference: GR/R32666/01
Title: COmputational HEteRogEneously timed NeTworks (COHERENT)
Principal Investigator: Yakovlev, Professor A
Other Investigators:
Kinniment, Professor D Koelmans, Dr AM Chester, Dr EG
Researcher Co-Investigators:
Project Partners:
Matra Bae / Matra Marconi (U K) Ltd
Department: Electrical, Electronic & Computer Eng
Organisation: Newcastle University
Scheme: Standard Research (Pre-FEC)
Starts: 18 July 2001 Ends: 17 November 2004 Value (£): 244,104
EPSRC Research Topic Classifications:
Energy Efficiency System on Chip
VLSI Design
EPSRC Industrial Sector Classifications:
Communications Aerospace, Defence and Marine
Electronics
Related Grants:
GR/R32895/02
Panel History:
Panel DatePanel NameOutcome
13 Feb 2001 Electronics, Comms & Functional Materials Deferred
Summary on Grant Application Form
COHERENT proposes to construct embedded real-time systems of medium complexity as on-chip systems (SoCs) with heterogeneous timing in order to improve timing and energy efficiency of systems for portable and miniature applications in control, robotics, image processing etc. The proposed concept of a hardware-oriented architecture for such systems, called real-time networks on chip (RTNoC), will consist of computational units of maximum diversity (outside the scope of the project) and communication components from a (finite set) of generic asynchronous communication mechanisms (ACMs), which is the focus of this project. The project will deliver a design methodology for RTNoC together with a parametrised library of ACM IP blocks that will, in the longer term, allow the designer to map an application-oriented specification of the system to its implementation with maximum transparency and minimum loss of time and energy resources. It will bridge the gap between the existing (e.g. MASCOT) ideas of building distributed real-time systems and those of globally asynchronous-locally synchronous (GALS) for SoCs by investigating techniques for efficient hardware implementation of the elements of communication and multitasking support in the former, and providing a wide range of asynchrony levels, from fully synchronous to wait-free and maximally non-blocking, for the latter. This will enable the seemless composition of systems with time-driven and data-driven parts.
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Organisation Website: http://www.ncl.ac.uk