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Details of Grant 

EPSRC Reference: EP/D060567/1
Title: Reconfigurable Architectures for Floating Point Applications
Principal Investigator: Luk, Professor W
Other Investigators:
Leong, Professor P Cheung, Professor PYK Mencer, Dr OP
Researcher Co-Investigators:
Project Partners:
Department: Dept of Computing
Organisation: Imperial College London
Scheme: Standard Research (Pre-FEC)
Starts: 01 June 2006 Ends: 30 November 2009 Value (£): 490,633
EPSRC Research Topic Classifications:
System on Chip
EPSRC Industrial Sector Classifications:
Electronics
Related Grants:
Panel History:  
Summary on Grant Application Form
Field programmable gate arrays (FPGAs) are integrated circuits whose functionality can be described via a downloadable bitstream. By downloading different bitstream configurations, customised applications can be developed with improvements in power and area over microprocessor based designs. To date, most FPGA-based applications have used fixed point arithmetic as floating point is expensive to implement on an FPGA. The two leading FPGA vendors, Xilinx and Altera, employ the so called island style architecture in which relatively small logic cells that implement the user-defined logic are surrounded by programmable routing channels.In this project we propose to develop FPGAs that are specifically optimised for floating point applications in signal processing, embedded systems and high performance computing. These will have speed and power advantages over existing FPGAs and microprocessors for floating point intensive computations and, to the best of our knowledge, no previous FPFPGAs have been reported.Three key tools will be developed in the course of this project: the development of a place and route tool that supports generalised FPFPGA architectures; benchmark problems that will be used to measure the performance of proposed FPFPGA archiectures and a tool which will produce integrated circuit layouts from the high level architectural description of the FPFPGA.Our development of the place and route tool will begin from the existing VPR tool developed at the University of Toronto. This will be modified to allow additional integer functional units and floating point units to be added to the basic island style architecture supported by VPR.
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Project URL: http://cc.doc.ic.ac.uk/devices.html
Further Information:  
Organisation Website: http://www.imperial.ac.uk